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Binary decision diagram
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#	Item
61	Exploring Multi-Valued Minimization Using Binary Methods Alan Mishchenko Department of EECS UC Berkeley Berkeley, CA[removed]removed] Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2007-01-21 13:03:49 Algebraic logic Binary decision diagram Diagrams Model checking Prime number 700 500 Canonical form Binary function Mathematics Boolean algebra Mathematical logic
62	c 2005 Old City Publishing, Inc. J. of Mult.-Valued Logic & Soft Computing., Vol. 11, pp. 437–465 Reprints available directly from the publisher Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2006-02-27 20:55:05 Computer programming Array programming languages Boolean algebra Diagrams IBM software APL Binary decision diagram K Circuit Computing Software engineering APL programming language family
63	Restructuring multi-level networks by using function approximations J. Cortadella M. Kishinevsky Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2003-04-08 11:43:32 Graph theory Science Binary decision diagram Boolean algebra Circuit Influence diagram Static single assignment form Artificial neuron Boolean network Diagrams Model checking Mathematics
64	Bi-Decomposition of Multi-Valued Relations Alan Mishchenko α α Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2001-05-09 04:01:38 Constraint programming Decomposition method Model theory Boolean algebra Function Canonical form Multivalued function Interpretation Binary decision diagram Mathematics Mathematical logic Functions and mappings
65	An Algorithm for Bi-Decomposition of Logic Functions Alan Mishchenko Bernd Steinbach Marek Perkowski Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2001-03-22 12:41:00 Binary decision diagram Diagrams Model checking Decomposition method Reed-Muller expansion Function Mathematics Boolean algebra Mathematical logic
66	An Experimental Evaluation of Algorithms for Computation of Internal Don’t-Cares in Boolean Networks Alan Mishchenko Department of Electrical and Computer Engineering Portland State University September 28, 2001 Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2001-10-20 03:32:06 Binary decision diagram Boolean algebra Diagrams Model checking Algorithm Circuit Boolean network Digital electronics Design Mathematics Theoretical computer science Applied mathematics
67	Symmetry Detection for Large Boolean Functions using Circuit Representation, Simulation, and Satisfiability Jin S. Zhang1 Alan Mishchenko2 Robert Brayton2 Malgorzata Chrzanowska-Jeske1 1 Department of ECE Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2006-05-08 11:02:36 Electronic engineering Electronic design automation Formal methods Diagrams Symmetry And-inverter graph Binary decision diagram Boolean satisfiability problem Symmetry in mathematics Mathematics Theoretical computer science Boolean algebra
68	IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOL. 25, NO. 5, MAY[removed]Using Simulation and Satisfiability to Compute Flexibilities in Boolean Networks Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2006-11-01 22:55:48 Mathematical logic Algebraic logic Logic Diagrams Formal methods Binary decision diagram Canonical form Circuit Boolean satisfiability problem Theoretical computer science Boolean algebra Mathematics
69	Logic Synthesis for Regular Layout using Satisfiability Marek Perkowski and Alan Mishchenko Department of Electrical and Computer Engineering Portland State University Portland, OR 97207, USA [mperkows, alanmi]@ece.pdx.e Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2002-05-01 01:40:28 Theoretical computer science Electronic design automation Diagrams Formal methods Lattice theory Binary decision diagram Boolean satisfiability problem Logic synthesis Lattice Abstract algebra Mathematics Boolean algebra
70	Optimization of Multi-Valued Multi-Level Networks M. Gao, J-H. Jiang, Y. Jiang, Y. Li, A. Mishchenko, S. Sinha, T. Villa, and R. Brayton Electrical Engineering and Computer Sciences Dept. University of California, Ber Add to Reading List Source URL: www.bvsrc.org Language: English* - Date: 2004-06-17 16:08:02 Diagrams Model checking Many-valued logic Flip-flop Electronics Mathematics Mathematical logic Electronic engineering Binary decision diagram Boolean algebra

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